Prof. Nowick receives grant to design asynchronous interconnect fabrics for parallel processors
10/24/2006
Prof. Nowick was awarded an ISE Grant (Initiatives in Science and Engineering) from the Office of the Executive Vice President for Research, Dr. David Hirsch. The funding is for innovative proposals in early stages of development, with a special interest in cross-disciplinary work.
The proposal is titled "Designing a Flexible High-Throughput Asynchronous Interconnect Fabric for Future Single-Chip Parallel Processors". The goal is to design a high-throughput, flexible and low-power digital fabric for future desktop parallel processors, e.g., those with 64+ processors per chip. The fabric will be designed using high-speed asynchronous pipelines, handling the communication between synchronous processor cores and distributed memory. The asynchrony of the fabric will facilitate lower power, handling of heterogeneous interfaces, and high access rates (with fine-grained pipelining). This work is in collaboration with the parallel processing and CAD groups at the University of Maryland, including Prof. Uzi Vishkin.